Digital to analog converters or DACs are well known in the art for providing an interface between the digital and the analog realm. The DAC functions by converting a digital, usually binary, input code to a corresponding analog signal, typically voltage or current. They may be implemented in a variety of fashions such as for example using simple switches or a network of resistors, capacitors or current sources.
In a segmented DAC architecture, the output of a first stage of the DAC architecture is used to provide the input for the second stage. The first stage provides first and second outputs and the second stage interpolates between those first and second outputs to provide an overall output for the DAC. Such circuits are well known in the art.
A modification to such traditional DAC architectures is disclosed in U.S. Pat. No. 7,015,847, co assigned to the assignee of the present invention and the content of which is incorporated herein by way of reference. This patent discloses how a first stage may be shared by multiple second stages. By using multiple second stages a multi-channel DAC may be provided.
With such multi-channel DAC arrangements it is possible for one or more of the DAC channels to be operated in parallel with others of the DAC channels, with the result that multiple outputs from the DAC are simultaneously possible. This is advantageous for a number of applications. However, if DC accuracy performance is required to be better than initial matching of the fabrication process requires then some calibration will be required to ensure that accurate conversion with the requisite levels is achieved.
There is further requirement with calibration that it be fast and cheap, in order to minimize delays in the DAC update during operation of the DAC. There is also always pressure on the designer of integrated circuits to minimize the area of silicon required for implementation of the circuit, and therefore if calibration is to be provided for the DAC it is preferable that the implementation of the calibration be provided in a manner that does not occupy too much space on the silicon.
There is therefore a need to provide a calibration technique for such multi-channel DACs which can be easily implemented.